자격 요건
[Physical Design Engineer]
1. 4년제 대졸 이상, 석사 우대
2. Chip Top 경험자 우대 : Hierarchy Design 경험 (Over 10 Blocks) , Block Partition, Top CTS
3. CPU/GPU Hardening 경험자 우대
4. P&R Experience : Floorplan, Place & Route, CTS, STA, DRC/LVS, IR Drop (ICC or Innovus, Prime-Time, StarRC, ICV or Calibre, RedHawk)
5. TSMC 16nm/12nm or Samsung 14nm 이하 경험자 우대
[Physical Implementation Engineer]
1. Scripting (shell, tcl, perl, phython, etc.)
2. Version Control system (Git, CVS, ClearCase, Perforce, etc.)
3. Bus protocol (AMBA, NoC etc)
4. Fluent in English (Business letter/email reading & writing etc.)