Engineering Group, Engineering Group > Systems Engineering

As a Lead Verification Engineer, you will be responsible for understanding the expected functionality of multimedia designs, specifically video codec and multimedia subsystems. Scoping and executing design verification activities for video HW IP and multimedia subsystem. You will work with the architects, designers and SW, FW engineers to plan and execute verification and validation. Deliver the IP for integration into SoCs for mobile applications. As a technical lead you will be responsible for building a team. Good communication skills are critical for this role to be successful in working with SW/FW/HW teams.

• Bachelor/master's degree in electrical engineering, computer science, or a closely related field • Experience in multimedia IP and sub-system verification involving SW/FW/HW. • Experience in building and leading the design verification team. • 10+ years’ experience in developing and architecting verification testbench environment, developing models. • 10+ years of experience with ASIC DV experience in verifying complex design at various levels Block, Core, Sub-system levels. • 5+ years of experience with HVLs: System Verilog, OO programming, Developing C/C++ models and integrating into testbench. • 5+ years of experience with Verilog, C/C++, TCL/Perl/Python/shell-scripting, SV, OVM/UVM methodology Minimum Qualifications: • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

• Master’s degree in electrical engineering, computer science, or a closely related field • Test planning, problem solving, debug, verification of multimedia hardware • Strong working experience in coverage-driven constraint random verification. • Experience in building simulation acceleration and emulation is plus • Prior experience in multimedia HW accelerator verification for video codec IP and Video codec knowledge like H.264/MPEG/HEVC/VP9/AV1.

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