주요업무
[기본업무]
- Verilog-HDL을 활용한 디지털 회로(RTL) 설계 및 C Programming 을 이용한 시뮬레이션
- SoC Top integration / logic design / verification
- 서브 시스템 및 IP integration / verification (UVM)
- ASIC Design Flow (Lint, Synthesis, LEC, STA)
[추가업무]
- CPU, GPU, NPU handling / integration / verification
- BUS(matrix, Noc, AMBA base IP) architecting / generation / integration / verification
- Memory(DDR/LPDDR/HBM) controller + PHY integration / verification
- High-Speed Interface IP (PCIe, D2D, USB, UFS, SD/eMMC, etc.)
- FPGA, HW Emulator targeting
- verification with firmware on FPGA/HW Emulator